Semiconductor devices are commonly found in modern electronic products.
Semiconductor devices vary in the number and density of electrical components. Discrete semiconductor devices generally contain one type of electrical component, e.g., light emitting diode (LED), small signal transistor, resistor, capacitor, inductor, and power metal oxide semiconductor field effect transistor (MOSFET). Integrated semiconductor devices typically contain hundreds to millions of electrical components. Examples of integrated semiconductor devices include microcontrollers, microprocessors, charged-coupled devices (CCDs), solar cells, and digital micro-mirror devices (DMDs).
Semiconductor devices perform a wide range of functions such as signal processing, high-speed calculations, transmitting and receiving electromagnetic signals, controlling electronic devices, transforming sunlight to electricity, and creating visual projections for television displays. Semiconductor devices are found in the fields of entertainment, communications, power conversion, networks, computers, and consumer products. Semiconductor devices are also found in military applications, aviation, automotive, industrial controllers, and office equipment.
Semiconductor devices exploit the electrical properties of semiconductor materials. The atomic structure of semiconductor material allows its electrical conductivity to be manipulated by the application of an electric field or base current or through the process of doping. Doping introduces impurities into the semiconductor material to manipulate and control the conductivity of the semiconductor device.
A semiconductor device contains active and passive electrical structures. Active structures, including bipolar and field effect transistors, control the flow of electrical current. By varying levels of doping and application of an electric field or base current, the transistor either promotes or restricts the flow of electrical current. Passive structures, including resistors, capacitors, and inductors, create a relationship between voltage and current necessary to perform a variety of electrical functions. The passive and active structures are electrically connected to form circuits, which enable the semiconductor device to perform high-speed calculations and other useful functions.
Semiconductor devices are generally manufactured using two complex manufacturing processes, i.e., front-end manufacturing, and back-end manufacturing, each involving potentially hundreds of steps. Front-end manufacturing involves the formation of a plurality of die on the surface of a semiconductor wafer. Each semiconductor die is typically identical and contains circuits formed by electrically connecting active and passive components. Back-end manufacturing involves singulating individual semiconductor die from the finished wafer and packaging the die to provide structural support and environmental isolation.
The terms “die”, “semiconductor chip”, and “semiconductor die” are used interchangeably throughout this specification. The term wafer is used herein include any structure having an exposed surface onto which a layer is deposited according to the present invention, for example, to form the circuit structure.
A “flip chip package” is a type of ball grid array (BGA) package that packages one or more integrated circuit dies. In a flip chip package, solder bumps are formed on the signal pads/terminals of a die, and the die is inverted (“flipped”) and attached to the substrate of the package by reflowing the solder bumps so that they attach to corresponding pads on the surface of the substrate. This inverted orientation of the die on the substrate is referred to as a “flip chip” orientation.
FIG. 1 shows a cross-sectional side view of an example flip chip package 100. As shown in FIG. 1, flip chip package 100 includes an integrated heat spreader (IHS) lid 102, an integrated circuit die/chip 104, a thermal interface material 106, a carrier substrate 108, a plurality of solder bumps 110, and a lid adhesive 112. Die 104 includes an active region 114, which contains analog or digital circuits implemented as active devices, passive devices, conductive layers, and dielectric layers formed according to the electrical design of the die 104. Die 104 is mounted face down, with the active region 114 facing down towards the carrier substrate 108. As shown in FIG. 1, die 104 is mounted to carrier substrate 108 by solder bumps/balls 110. The IHS lid 102 is mounted to the carrier substrate 108 over the die 104. The adhesive 112 bonds a rim of the IHS lid 102 to the carrier substrate 108. The thermal interface material 106 is present on a top surface of the die 104 to provide for good heat conductance between the IHS lid 102 and the die 104. The carrier substrate 108 is electrically and mechanically connected to a printed circuit board (PCB) 114 with a BGA style second level packaging using conductive bumps 116. Semiconductor die 104 is electrically connected to PCB 114 through conductive bumps 110, signal lines 118, and conductive bumps 116.
Typically, IC packages are asymmetrical (in the direction perpendicular to the plane of the substrate) and are mechanically unbalanced. This asymmetry, along with the different materials used in the packaging (e.g., an organic package substrate, which has a different coefficient of thermal expansion (CTE) than the IC die), can cause both mechanical and thermal stresses, which in turn can lead to package warpage and co-planarity issues. Thus, it is known that wafer warpage continues to be a concern. Warpage can prevent successful assembly of a die-to-wafer stack because of the inability to maintain the coupling of the die and wafer. Warpage issue is serious especially in a large sized wafer and has raised an obstacle to a wafer level semiconductor packaging process that requires fine-pitch RDL process.
The present disclosure provides novel improved packaging methods resulting in reduced warpage or other defects.